Location
San Jose
Job Type
Full-time
Posted
June 17, 2026
Job Description
**Position:**
Design Verification Engineer IV
**Job Description:**
**What You'll Be Doing:**
+ Strong SV/UVM expertise
+ AXI/NOC/Ethernet/PCIe/UCIe Switch expertise is needed
+ CPU ARM/RISC-V with C knowledge
+ Regression & Coverage Closure
**What We Are Looking For:**
+ Responsible for architecting Verification Environment for ASIC SoC and providing verification support from defining verification plan to multi-million gate product tapeout & for Test design and development.
+ Develop complex self checking test benches with constraint random stimulus generation.
+ Architect SoC test FW and create test plan documentation to cover ASIC features.
+ Develop and debug SoC ASIC platform test FW and specific tests in C/C++.
+ Partner in methodology development activities & actively planning, analyzing and reviewing functional and technical specification documents.
+ Implement and maintain integrated end-to-end formal verif...
Design Verification Engineer IV
**Job Description:**
**What You'll Be Doing:**
+ Strong SV/UVM expertise
+ AXI/NOC/Ethernet/PCIe/UCIe Switch expertise is needed
+ CPU ARM/RISC-V with C knowledge
+ Regression & Coverage Closure
**What We Are Looking For:**
+ Responsible for architecting Verification Environment for ASIC SoC and providing verification support from defining verification plan to multi-million gate product tapeout & for Test design and development.
+ Develop complex self checking test benches with constraint random stimulus generation.
+ Architect SoC test FW and create test plan documentation to cover ASIC features.
+ Develop and debug SoC ASIC platform test FW and specific tests in C/C++.
+ Partner in methodology development activities & actively planning, analyzing and reviewing functional and technical specification documents.
+ Implement and maintain integrated end-to-end formal verif...
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