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ASIC Engineering Digital Designer/ Leader ( digital design, FSM, CPU sub-systems, complex SOCs, FPGA validation | 8-12 Years | Pune)
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View JobLeader, Hardware Engineering | Power Electronics, Power Systems, Power Design, Buck-boost, Fly-back, Buck, Allegro, LTspice, PSpice, People Leadership | 14+ years, Bangalore
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View JobASIC - Signal and Power Integrity Technical Leader - 10 to 16 Years - Bangalore/Chennai
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View JobSenior CAD Engineer – PDK & IP Integration || Program management || Exp - 8+ years
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View JobASIC Engineering Design Verification Leader (SystemVerilog, Python, C and UVM |12-16 years| Pune)
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View JobMechanical Engineer || System Integration || FEA with Ansys || APDL , 2.5D, 3D Packaging || Exp - 7 to 10 years
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View JobASIC Engineering Design Verification Leader (SystemVerilog, Python, C and UVM |8-12 years| Pune)
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View JobSDWAN/L3 Test Engineer | L2/L3 security | Network automation (8-12 Years)
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