Location
Shenzhen
Job Type
Full-time
Posted
June 30, 2026
Job Description
* Work with Architecture and Software teams to ensure DDR micro-architecture and design is fully verified/validated across multiple platforms
* Define testplan for specific block level design and execute the tesplan to achieve function verfication closure
* Development of reusable block level UVM verification enviroment with checker/monitor/driver etc,
* Define testplan for specific block level design and execute the tesplan to achieve function verfication closure
* Development of reusable block level UVM verification enviroment with checker/monitor/driver etc,