Semiconductor Layout & Mask Tooling Engineer

Allegro MicroSystems, LLC in Buenos Aires is seeking a Device Layout and Mask Tooling Engineer to support the Design Enablement team. The role involves generating semiconductor device layouts in Cadence and supporting the release of Foundry mask manufacturing requirements for a global design community.

The ideal candidate will have a BSEE and at least 1 year of industry experience with strong skills in EDA design software and teamwork. This position is crucial for impacting the development of BCD technology.