Senior Analog/Mixed-Signal Architect - PLLs & SERDES IP

A leading technology firm in the semiconductor industry is seeking a senior engineer to join their Mixed Signal Development Group in Calgary, Alberta. The candidate will design and support mixed-signal IPs, including PLLs and high-speed SERDES circuits. A strong background in analog/mixed-signal circuit design, collaboration with IP vendors, and project management is required. The role offers a competitive compensation package, including a base salary range of $86,000 to $186,000 along with numerous benefits.
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