Senior HBM Physical Design Architect

A leading semiconductor company is seeking a Principal Physical Design Architect located in Boise, Idaho. This role involves developing optimized floorplans, delivering block-level layouts, and collaborating with architects and circuit designers for next-generation High Bandwidth Memory (HBM) products. Ideal candidates should possess advanced knowledge in analog layout fundamentals and tools like Cadence VLE/VXL. They should have a strong background in memory-related layout or physical design with at least 5 years of experience. Competitive salary and robust benefits package are offered. #J-18808-Ljbffr