Senior SOC Verification Engineer - SV-UVM Pre-Silicon Lead

MaxLinear, Inc. is looking for a SOC Verification Engineer to join our VLSI group in Singapore. You will engage in pre-silicon RTL verification of block, subsystem, and top-level SoC. This role emphasizes developing testbenches in SV-UVM and involves working closely with cross-functional teams. Candidates should possess a Bachelor’s degree in Electronics Engineering with 6 years or a Master’s with 3 years of experience. Fresh graduates are welcome to apply, and the position offers significant opportunities for skill development and collaboration.
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