Senior/Lead FPGA Acceleration Engineer (LLM on FPGA)

About the job

【About the Role】

Join our pioneering team to redefine the future of local inference for AI models and ecosystems. We are building an FPGA-based general computation systems as a superior alternative to GPUs for Large Language Model (LLM) acceleration in Edge and Open Radio Access Network (O-RAN) environments. You will lead the hardware design, optimizing and accelerating high-performance AI inference on FPGA-based platforms.

【Key Responsibilities】

• FPGA Development: Architect, optimize, and develop hardware acceleration designs for local inference of LLMs on AMD FPGA platforms. Perform synthesis, place-and-route, timing closure, and power analysis. Debug FPGA-related issues using built-in logic analyzers with JTAG debuggers.
• IP Development and Integration: Develop/optimize key IPs such as MIGs/PCIe/DMA cores/parallel computing entities at RTL. Create testbenches and verification...