VLSI Physical Design Engineer - Floorplanning & Timing

UST in Penang, Malaysia is looking for a Design Engineer to support floorplanning, placement, and timing closure. Candidates should have a Bachelor’s or Master’s in Electronics or Electrical Engineering and a basic understanding of digital design and VLSI concepts.

The ideal candidate will assist with automation scripts and collaborate with teams to meet timing and area targets. Knowledge of physical design tools like Innovus or ICC2 is an advantage.